13 January 2011

Scholarship in France (ESIEE Paris)

Post Doctoral Position in Digital Signal Processing for High Efficiency RF Transmitter, France


This position will take place at ESIEE Paris, LaMIPS, 2Bd Blaise Pascal, 93162 Noisy le grand, France
This position is related to research activities and will be under supervision of: C.Berland, c.berland[ at ]esiee.fr, O.Venard, o.venard[ at ]esiee.fr
This research team belongs to LaMIPS, Laboratoire commun NXP-CRISMAT, UMR 6508 CNRS ENSICAEN UCBN, Caen.
Description:
This position will last 20 months from february 2011 and will be funded. It will be held in the framework of the FP7-PEOPLE-2008-IAPP Par4CR project (Partnership for the Development of Cognitive Radio).

Par4CR brings together a consortium of seven major European players to perform a joint research programme and exchange knowledge on technologies crucial for the development of software-defined radio and cognitive radio. The overall goal of the research programme of Par4CR is to develop a new architecture for software defined radio as a step towards cognitive radio based on wideband operation of transmitter and receiver.
The foreseen research work will handle “system design transmitter concepts” and “implementation strategy of critical blocks transmitter”. Radiocommunication systems aim to increase their data rate by using more efficient modulation scheme which in turn exhibits high peak to average power ratio (PAPR). Such high PAPR signal decreases the power efficiency because of the needed back-off and increases the linearity requirement because of the swing of signal magnitude.
Among architectures proposed to accommodate the trade-off between power efficiency and linearity, one can quote: polar EER (Envelope Elimination and Restoration), LINC (LInear amplification with Non linear Components) and Cartesian Transmitter based on a Doherty PA or envelope tracking. Albeit those architectures offer significant improvement to process the modulated RF signal, they also have their own weaknesses and new technical challenges.
There are different approaches where Digital Signal Processing (DSP) could help to alleviate block and system impairments. Digital Signal Processing appears to be a “building block” for Software Defined Radio and then Cognitive Radio. One issue is then to develop suitable algorithms able to target both system level impairments mitigation and new approaches for Tx architecture.
Transmitter for SDR BTS must be able to handle multicarrier or simultaneous transmission of different standards, thus they require being wideband (either agile or switchable) and having high transmit power to fulfil stringent constraints regarding both transmission power and bandwidth.
Various architecture have to be revisited ranging from Cartesian (Doherty solutions, envelope tracking), LINC, or polar architecture Envelope Elimination and Restoration.
Key points about the added value of including signal processing in the transmit path will be to consider: predistortion correction, crest reduction factor, non linear modelisation of PA, High level modelisation of analog parts and Bandwidth of processing.
This post-doctoral position will require an expertise in the areas of transceivers architecture, digital signal processing and adaptive algorithms. Experience in implementation of algorithms on FPGAs and digital signal processors supplemented by knowledge in mobile radio communication systems will be valuable for this position.
You will have to analyze and evaluate such adaptive digital signal processing algorithms for radio communication transmitters, then target FPGA for their implementation and validation in a radio platform demonstrator.
This work will require a bibliographical study. It will use the communication system simulation framework, Agilent ADS, SystemVue and migration to Simulink for the FPGA DSP algorithm implementation.

0 comments:

Post a Comment